SCI Registers

There are five addressable registers in the SCI:

1. Serial Communications Data Register: SCDR is a parallel register that receives data when it is read, and transmits data when it is written. Reads access the receive data buffer and writes access the transmit data buffer. Receive and transmit are double buffered.
2. Serial Communications Control Register 1: SCSR1 provides the control bits that determine word length and select the method used for the wakeup feature.
3. Serial Communications Control Register 2: SCSR2 provides the control bits that enable or disable individual SCI functions like transmit interrupt enable, receiver interrupt enable, idle-line interrupt enable, transmitter enable and receiver enable among others.
4. Serial Communication Status Register: SCSR provides inputs to the interrupt logic circuits for generation of the SCI system interrupt. It contains all the error detection flags, besides the transmit complete and receive data register full flags.
5. Baud Rate Register: This register is used to select different baud rates for the SCI system. The SCP[1:0] bits function as a prescaler for the SCR[2:0] bits. Together these five bits provide multiple baud rate combinations for a given crystal frequency. Right now the EVBU has an 8MHz crystal, and we are using a 9600 Baud rate.

For our communication, I used a standard available subroutine called INIT to initialize the SCI, and then wrote two subroutines to read and write data, which were very similar to the standard ones, except that they do not modify the data, read carriage return or line feed as they are and also use all 8 bits instead of masking off the 8th bit for parity.